China Deploys Non-Binary AI Chips at Scale, Pioneering Hybrid Computing
In a global first, China has begun large-scale deployment of non-binary AI chips across critical sectors including aviation, intelligent displays, and industrial control systems. This innovation comes from Professor Li Hongge’s team at Beihang University in Beijing and is based on a novel method called Hybrid Stochastic Number (HSN) computing, according to the South China Morning Post.
The chip combines traditional binary logic with stochastic, or probabilistic, logic to create a new approach to data processing. It also avoids using components restricted by US sanctions.
What challenges is China addressing with hybrid computing?
The report highlights two main limitations of conventional chips: the power wall and the architecture wall.
The power wall refers to the high energy demands of binary systems. While binary logic based on 1s and 0s delivers accuracy, it requires significant power, making it difficult to scale.
The architecture wall concerns the difficulty of integrating non-silicon or alternative chips with existing CMOS (complementary metal-oxide-semiconductor) technology, which forms the foundation of most global computing infrastructure. Hybrid computing, according to Li’s team, addresses both issues.
How does hybrid stochastic computing work?
Traditional binary systems rely on exact calculations that require substantial hardware resources. In contrast, stochastic computing uses voltage signal frequencies to represent values. This reduces power consumption but can lead to slower performance and reduced precision.
Li’s team merged these two concepts to create the Hybrid Stochastic Number system. It integrates:
- Binary numbers for precision
- Stochastic numbers for energy efficiency
- A hybrid form that balances low power use with reliable performance
According to the team, the result is a chip that is energy-efficient, fault-tolerant, and resistant to signal noise.
Where is this technology being applied?
The chip has already been used in several real-world systems. In touch display applications, it enhances user experience by filtering noise and accurately detecting weak signals. In medical and industrial displays, it enables fast, low-power processing for precise data readings.
The chip is also used in flight control systems, where it ensures stable navigation and strong fault tolerance, both essential for aerospace and defense.
These systems benefit from the chip’s in-memory computing ability, which reduces the need for energy-intensive data transfers between memory and processors. This helps overcome a major limitation in traditional computing systems.
How did the team build the chip despite US restrictions?
While the global race for high-performance chips focuses on advanced nodes like 5nm or 3nm, Li’s team used 110nm and 28nm manufacturing processes provided by Semiconductor Manufacturing International Corporation (SMIC), China’s top chipmaker.
This approach is important because it relies on mature, domestically available technologies. It avoids US export restrictions on high-end chips while advancing performance through architectural design rather than cutting-edge hardware.
What comes next for this technology?
The team is now developing a custom instruction set architecture (ISA) and microarchitecture specifically designed for hybrid probabilistic computing. This will allow the chip to support advanced tasks like accelerating AI models, recognizing speech and images, and powering neural networks.
This development could provide China with a home-grown solution for the future of large-scale AI and machine learning, independent of foreign tech.
As US-China tech competition intensifies, Beijing is working toward semiconductor self-reliance. This chip may serve as a model for innovation under constraints. Rather than compete directly in advanced chip manufacturing, China is reimagining how computing is done. If successful, this approach could influence global chip design by shifting focus from transistor counts to new computing logic.
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